In its simplest terms a LAN is a communication medium, formed by a collection of wires, optical paths, or the like, and network adapters to which a computer or other data processing-like device is connected. The network adapter and the device to which it is connected are termed a "node". A source node initiates the communication of a message to a destination node. The network adapter at a source node receives data from the device to which it is connected and sends the data over the communication medium to the destination node. The network adapter at the destination node receives the data transmitted over the network medium and delivers the communicated data to the device to which it is connected. To complete the communication, information may be communicated back and forth between the source and destination nodes, and thus both the source and destination nodes may each act as sending and receiving nodes during the communication. Communications over the medium occur in strict compliance with a predetermined network communication protocol which each of the adapters follows in sending and receiving the data. Selection of the particular nodes between which the data transfers occur is also made in compliance with the protocol, as is access to the medium for initiating the communication, among other things.
Connecting PCs and other data processing devices together achieves a variety of advantages. For example data may be shared between different PCs. In some cases, the actual computational tasks may be shared between different computers. Present trends in computer systems are emphasizing networks of computational resources. Networking PCs is already a very large part of the present market, consuming an estimated 75%-80% of the 4 million LAN connections sold in 1989.
A number of LANs are available for networking PCs, such as ARCNET (the first LAN), Ethernet (presently, the most widely used LAN), and Token Ring (presently, the most rapidly growing LAN). Presently these LANs constitute at least 80% of the installed base. However, conventional LANs are relatively expensive when used for the purpose of networking PCs, particularly in relation to the relatively moderate cost and the relatively high performance of modern PCs.
Conventional LANs were originally developed for connecting minicomputers and workstations and not for networking PCs. Early minicomputers and workstations had sustainable input/output (I/O) data rates which were variable, and quite slow by present standards. Furthermore, few if any of the earlier processing devices attached at the nodes had the computational resources available from modern PCs. Since most of the conventional LANs that were developed during this time period had data rates which exceeded the sustainable I/O rates of the processing devices which were available at that time, the network adapters incorporated considerable hardware and logic to sustain such increased data transfer rates independent of the capabilities of the device connected at the node.
The typical network adapter for a conventional LAN uses a network transceiver by which to transmit and receive signals on the medium, a network controller, and a dedicated packet buffer random access memory (RAM). The packet buffer is used to hold outgoing packets awaiting transmission and to hold incoming packets which have been received but not yet processed by the attached device. A packet is an extensive block of data, for example hundreds or thousands of bytes, which is transferred as a unit between nodes. The packet buffer is of sufficient size to hold one or more full packets, typically four to sixteen packets. The packet buffer is controlled by the network controller and is accessible to both the controller and the attached device under some form of access arbitration which is performed by the controller. The packet buffer is present to separate the network controller from the I/O timing operations of the attached processing device. Packet transfers in conventional LANs occur under circumstances dictated by the network communication protocol, which are independent of and separate from the timing operations of the attached device. The use of the packet buffers ensure that the data packet transfers can be sustained without interruptions or variations in data rate during the transfer of a packet between nodes.
Although the packet buffer was originally conceived as a necessary item to obtain the desired functionality of conventional LANs, it is also relatively expensive. Even though the RAM chips are only a few dollars at present prices, the logic to access and arbitrate the packet buffer RAM, and the circuit board conductors needed to conduct the RAM address and control signals, constitute up to 40% of the complexity of most conventional LAN adapters.
The hardware and logic required for conventional adapters is now presently recognized as more than necessary to perform the basic LAN functions between networked PCs, particularly since modern PCs inherently incorporate some of the resources and functionality which is useful in achieving basic LAN data transfer functions. Consequently efforts have been made to reduce the costs of networking PCs, and several low-cost PC networks have been offered to the PC marketplace.
To avoid some of the cost and complexity associated with the packet buffers, some LAN controllers have incorporated first-in, first-out (FIFO) buffers in lieu of RAM buffers. However, the highly variable latency on PC I/O busses relegates the applicability of the FIFO buffer approach to minicomputers and workstations. Latency is the time delay from the time the request to transfer data is received until the data transfer is performed. Latency is particularly variable in PCs, compared to other, more sophisticated computer systems.
Another early attempt to reduce the cost of networking PCs by using hardware already present in the PC is a "zero-slot LAN," designated as such because it does not require an additional plug-in adapter card to achieve network-like functionality. Zero-slot LANs use the serial I/O port of the PC to transfer data under LAN-like protocols to offer network-style functionality. The major problem with zero slot LANs is that the maximum data rates are usually far too slow. Typical zero-slot LANs transfer data at 10 Kbps-100 Kbps, with the fastest operating at less than 250 Kbps. This contrasts with data rates of 2 Mbps-10 Mbps for typical LANs. Of course, the "software-only" approach of zero-slot LANs is very inexpensive, but the performance limits have restricted the appeal of zero-slot LANs to printer-sharing (versus disk-sharing or workgroup) applications and very small networks.
A more successful attempt to reduce the cost of networking PCs by using hardware already present in the PC is to utilize the direct memory access (DMA) controller on the PC to transfer the LAN data to and from system memory. The DMA controller is on the motherboard along with the processor and the primary system memory. I/O add-in cards can request DMA service, to which the DMA controller will respond. DMA channels are universally available on all IBM and IBM-compatible PCs and are usually under-utilized. The useful function of LANs is to transport data between system memory at the source node and system memory at the destination node, and the use of the DMA channels to perform this function has advantages.
A significant problem in using the DMA channels for networking functions is that the DMA channels are relatively slow and have highly-variable latency, especially the 8-bit channels, which are present on any IBM-compatible PC. With respect to the DMA channel, latency can be further defined as the delay from the time that the DMA controller receives the DMA request until the DMA controller responds by performing the DMA data transfer. The least common denominator data rate which can be relied on for the 8-bit DMA channels of all PCs is about 1.33 Mbps, which is why most DMA-based LANs operate at data rates of 1.25 Mbps or below. With PCs having 16-bit DMA capability, this data limit can be raised to about 2 Mbps, which has been used by a few DMA-based LANs. These restrictions on the data rate are needed because, if the LAN data rate exceeds the data rate at which the DMA can supply data during transmission, a DMA "underrun" condition will occur, and the outgoing packet will be invalid and will require retransmission. If the LAN data rate exceeds the data rate at which the DMA can accept data during reception, a DMA "overrun" condition will occur, and the incoming packet will be improperly received and will require retransmission.
The combination of potentially low speed and universally variable latency severely restricts the speed of sustainable transfers that can be achieved when using motherboard DMA. On 80286- and 80386-based PCs, memory-to-memory data movement instructions executed by the processor can actually out-run DMA transfers. Consequently, on these machines, if significant buffering is needed in the adapter to assure smooth LAN data flow, it is preferable to use a packet buffer RAM, loaded and unloaded by software, as with a conventional LAN.
In addition to the concepts of LAN adapters and previous low cost arrangements for networking PCs, another background subject pertinent to the present invention is flow control. Flow control relates to the use of signals to indicate the ability to receive data during a transfer and to indicate the successful receipt of the data after a transfer.
Most direct, high-speed I/O interfaces to computers use parallel I/O interfaces, which allow a plurality of related data and control signals to be communicated in parallel and simultaneously. In such parallel I/O interfaces it is conventional to have a dedicated control signal to indicate when new data is available for transfer and a second dedicated control signal by which the receiving side of the I/O interface responds to indicate acceptance of the data transfer and readiness for the next data transfer. This set of dedicated signals produces a request/acknowledge sequence for each transfer, often called a "handshake". A handshake provides an inherent form of throughput control, in that each parallel set of data is transferred when the receiving unit is known to be able to receive that data. However, this is not generally referred to as flow control, which is a term usually reserved for describing the functionality of various types of serial interfaces.
Serial I/O interfaces, of which LANs can be regarded as one type thereof, transfer data sequentially, one bit at a time, thereby allowing transfers at longer distances and lower costs than multi-bit parallel interfaces. It is not possible to implement a conventional handshake at the basic transfer level in serial interfaces, since a handshake would require a signal path in addition to the serial signal path.
Flow control is not usually used to control data transfers on a LAN. Instead, LANs transfer blocks of data in packets. If flow control is applied at all on a conventional LAN, it occurs at the packet or higher level. On such LANs, acknowledgements are provided at the packet level, and retransmission of an entire packet is the only means of recovering from unsuccessfully delivered packets, including those whose unsuccessful delivery was due to a receiver that was not ready to accept one or more bytes of the packet, rather than a data error during the transfer.
Some LANs implement a primitive form of flow control in the form of a "Free Buffer Enquiry" or a "Request To Send" frame. These are short, special-purpose messages sent over the network to attempt to determine if the intended destination node is able to receive the pending data packet transmission. The response to these flow control frames are in the form of a short "Acknowledge", "Negative Acknowledge" or "Clear To Send" frame. It is important to note that all of these messages require the transmission of actual network frames, which require significant time to transmit and receive. A further drawback of the frame-based flow control, especially on LANs without dedicated packet buffers, is that a determination that the receiver is ready does not mean that the receiver will be able to accept the data at the rate it is going to subsequently be sent.
On low speed serial I/O ports for computer systems, flow control is frequently used to regulate the transfer of data on a byte-by-byte basis. The traditional form of this flow control is to use discrete signals, typically called Request-To-Send (RTS) and Clear-To-Send (CTS), in addition to the Transmit Data (TXD) and Receive Data (RXD) signals. The use of these signals actually makes the "serial" interface a 2-bit parallel interface, but this 2-bit parallel connection is still regarded as serial, probably because the added signal(s) are used strictly for control functions, while the data transfer itself occurs serially, using a single conductor.
When using RTS/CTS flow control, a source asserts RTS, and waits until the corresponding assertion of CTS by the destination. Once the CTS is received, the source transmitter is activated. The major distinction between RTS/CTS flow control and parallel interface handshaking is that the assertion of CTS indicates readiness to receive, not the successful receipt of the data transferred. Thus the RTS/CTS signalling technique is limited to controlling flow, and has no acknowledgement function.
Because the electrical characteristics and cabling requirements of a TXD/RXD/RTS/CTS interface limit the distance over which the interface can be used on a cost effective basis, serial data communication links have adopted another type of flow control, called character-based flow control, for longer distance usage. Character-based flow control uses certain character codes transmitted to indicate that further communication should be stopped and restarted. Commonly used codes are XOFF (ctrl-S) to halt a transmission and XON (ctrl-Q) to restart a transmission. One drawback to character-based flow control is the fact that at least two of the possible data codes are reserved for control purposes, which requires that software ensure that these codes never appear in the data being sent. Another drawback to character-based flow control is that the transceiver circuitry or higher level software must be able to detect and respond to these codes within the time duration for the transmission of one character, thereby limiting transfer rates. Since XOFF and XON can be thought of as 1-byte frames which have been simplified because a serial, point-to-point link does not require address fields and command fields which are required with a LAN, character-based flow control can be thought of as a degenerate form of frame-based flow control.
It is against this background that the significant improvements and advancements of the present invention have evolved.